Preprints

• Preprint A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA
  Wenji Fang, Jing Wang, Yao Lu, Shang Liu, Yuchao Wu, Yuzhe Ma, and Zhiyao Xie*
  Preprint (a 60-page survey on circuit foundation models, covering 130+ works), March 2025. pdf arxiv

Peer-Reviewed Publications

All publications below are full-length (regular or invited) papers, NOT including short papers, brief papers, extended abstract, late breaking results, findings, student forum papers/posters, tutorials, contests, etc.

My supervised students in HKUST are highlighted with underline.

• ASPDAC’26 ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework
  Qijun Zhang, Shang Liu, Yao Lu, Mengming Li, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2026. (Acceptance rate=29.9%)
  Rank Second in the Track

In 2025:

• EMNLP’25 SynC-LLM: Generation of Large-Scale Synthetic Circuit Code with Hierarchical Language Models
  Shang Liu, Yao Lu, Wenji Fang, Jing Wang, and Zhiyao Xie*
  Conference on Empirical Methods in Natural Language Processing (EMNLP), 2025. (Acceptance rate=22%)

• ICCAD’25 GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment
  Wenji Fang, Jing Wang, Yao Lu, Shang Liu, and Zhiyao Xie*
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2025. (Acceptance rate=24.7%) arxiv

• ICCAD’25 HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutions
  Jing Wang, Shang Liu, Yao Lu, and Zhiyao Xie*
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2025. (Acceptance rate=24.7%) arxiv

• ISCA’25 Profile-Guided Temporal Prefetching
  Mengming Li, Qijun Zhang, Yichuan Gao, Wenji Fang, Yao Lu, Yongqing Ren, and Zhiyao Xie*
  International Symposium on Computer Architecture (ISCA), 2025. (Acceptance rate=23%) arxiv pdf

• DAC’25 AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling
  Qijun Zhang, Yao Lu, Mengming Li, and Zhiyao Xie*
  ACM/IEEE Design Automation Conference (DAC), 2025. (Acceptance rate=23%) pdf

• DAC’25 ATLAS: A Self-Supervised and Cross-Stage Netlist Power Model for Fine-Grained Time-Based Layout Power Analysis
  Wenkai Li, Yao Lu, Wenji Fang, Jing Wang, Qijun Zhang, and Zhiyao Xie*
  ACM/IEEE Design Automation Conference (DAC), 2025. (Acceptance rate=23%) pdf

• DAC’25 NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph
  Wenji Fang, Wenkai Li, Shang Liu, Yao Lu, Hongce Zhang, and Zhiyao Xie*
  ACM/IEEE Design Automation Conference (DAC), 2025. (Acceptance rate=23%) arxiv pdf

• DAC’25 SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits
  Shang Liu, Jing Wang, Wenji Fang, and Zhiyao Xie*
  ACM/IEEE Design Automation Conference (DAC), 2025. (Acceptance rate=23%) pdf

• DAC’25 ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring
  Dimitrios Tsaras, Xing Li, Lei Chen, Zhiyao Xie, and Mingxuan Yuan
  ACM/IEEE Design Automation Conference (DAC), 2025. (Acceptance rate=23%) pdf

• HPCA’25 Integrating Prefetcher Selection with Dynamic Request Allocation Improves Prefetching Efficiency
  Mengming Li, Qijun Zhang, Yongqing Ren, and Zhiyao Xie*
  IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2025. (Acceptance rate=21%) pdf

• ICLR’25 CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design
  Wenji Fang, Shang Liu, Jing Wang, and Zhiyao Xie*
  International Conference on Learning Representations (ICLR), 2025. (Acceptance rate=32%) pdf

• TODAES’25 LithoExp: Explainable Two-stage CNN-based Lithographic Hotspot Detection with Layout Defect Localization
  Cong Jiang, Haoyang Sun, Dan Feng, Zhiyao Xie, Benjamin Tan, Kang Liu
  ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025. ACM pdf

• ASPDAC’25 A Self-Supervised, Pre-Trained, and Cross-Stage-Aligned Circuit Encoder Provides a Foundation for Various Design Tasks
  Wenji Fang, Shang Liu, Hongce Zhang, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf

• ASPDAC’25 Towards Big Data in AI for EDA Research: Generation of New Pseudo Circuits at RTL Stage
  Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf

• ASPDAC’25 FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling
  Qijun Zhang, Mengming Li, Yao Lu, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf

• ASPDAC’25 Pointer: An Energy-Efficient ReRAM-based Point Cloud Recognition Accelerator with Inter-layer and Intra-layer Optimizations
  Qijun Zhang, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf

• ASPDAC’25 SMART-GPO: Gate-Level Sensitivity Measurement with Accurate Estimation for Glitch Power Optimization
  Yikang Ouyang, Yuchao Wu, Dongsheng Zuo, Subhendu Roy, Tinghuan Chen, Zhiyao Xie, and Yuzhe Ma
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf
  Best Paper Nomination

• ASPDAC’25 AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
  Zhiyuan Yan, Wenji Fang, Mengming Li, Min Li, Shang Liu, Zhiyao Xie*, and Hongce Zhang*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf

• ASPDAC’25 PRICING: Privacy-Preserving Circuit Data Sharing Framework for Lithographic Hotspot Detection
  Chen-Chia Chang, Wan-Hsuan Lin, Jingyu Pan, Guanglei Zhou, Zhiyao Xie, Jiang Hu, and Yiran Chen
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. (Acceptance rate=28.6%) pdf

• ISEDA’25 SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model
  Mengming Li, Wenji Fang, Qijun Zhang, Zhiyao Xie*
  International Symposium of EDA (ISEDA), 2025. arxiv

In 2024:

• TCAD’24 An Architecture-Level CPU Modeling Framework for Power and Other Design Qualities
  Qijun Zhang, Mengming Li, Andrea Mondelli, and Zhiyao Xie*
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024. IEEE pdf

• TCAD’24 RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique
  Shang Liu, Wenji Fang, Yao Lu, Jing Wang, Qijun Zhang, Hongce Zhang, and Zhiyao Xie*
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024. IEEE pdf arxiv code

• TCAD’24 Transferable Pre-Synthesis PPA Estimation for RTL Designs with Data Augmentation Techniques
  Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, and Zhiyao Xie*
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024. IEEE pdf code

• ICCAD’24 OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation (Invited)
  Shang Liu, Yao Lu, Wenji Fang, Mengming Li, and Zhiyao Xie*
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2024. (Acceptance rate=24%) pdf

• ICCAD’24 EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research (Invited)
  Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Yiran Chen, Hai Li
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2024. (Acceptance rate=24%) pdf

• SCIS’24 Large Circuit Models: Opportunities and Challenges
  One of the 40+ authors in alphabetical order
  Science China Information Sciences (SCIS), 2024. pdf

• TCAD’24 Data-pattern-based Predictive On-Chip Power Meter in DNN Accelerator
  Jian Peng, Tingyuan Liang, Jingbo Jiang, Yipu Zhang, Zhe Lin, Zhiyao Xie, and Wei Zhang
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024. IEEE pdf

• ISLPED’24 Unleashing Flexibility of ML-based Power Estimators Through Efficient Development Strategies
  Yao Lu, Qijun Zhang, and Zhiyao Xie*
  ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2024. (Acceptance rate=23%) pdf
  Best Paper Nomination (8 nominees out of 167 submissions) record

• LAD’24 RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution
  Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Hongce Zhang, and Zhiyao Xie*
  IEEE International Workshop on LLM-Aided Design (LAD), 2024. IEEE pdf pdf2 arxiv code
  Best Paper Nomination (6 nominees out of 50 submissions) record

• DAC’24 Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization
  Wenji Fang, Shang Liu, Hongce Zhang*, and Zhiyao Xie*
  ACM/IEEE Design Automation Conference (DAC), 2024. (Acceptance rate=22%) pdf code

• DAC’24 Accel-NASBench: Sustainable Benchmarking for Accelerator-Aware NAS
  Afzal Ahmad, Linfeng Du, Zhiyao Xie, and Wei Zhang
  ACM/IEEE Design Automation Conference (DAC), 2024. (Acceptance rate=22%) pdf code

• TRETS’24 FADO: Floorplan-Aware Directive Optimization Based on Synthesis and Analytical Models for High-Level Synthesis Designs on Multi-Die FPGAs
  Linfeng Du, Tingyuan Liang, Xiaofeng Zhou, Jinming Ge, Shangkun Li, Sharad Sinha, Jieru Zhao, Zhiyao Xie, and Wei Zhang
  ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2024. pdf code

• ASPDAC’24 RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model
  Yao Lu, Shang Liu, Qijun Zhang, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2024. (Acceptance rate=29%) pdf code
  Trending CS Papers (Top 5 in Hardware Architecture, 08/2024) record

• ASPDAC’24 APPLE: An Explainer of ML Predictions on Circuit Layout at the Circuit-Element Level
  Tao Zhang, Haoyu Yang, Kang Liu, and Zhiyao Xie*
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2024. (Acceptance rate=29%) pdf code

In 2023:

• TCAD’23 The Dark Side: Security and Reliability Concerns in Machine Learning for EDA
  Zhiyao Xie*, Jingyu Pan, Chen-Chia Chang, Jiang Hu, and Yiran Chen
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023. IEEE pdf

• TCAD’23 Towards Fully Automated Machine Learning for Routability Estimator Development
  Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Tunhou Zhang, Jiang Hu, and Yiran Chen
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023. IEEE pdf

• ICCAD’23 PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions
  Qijun Zhang, Shiyu Li, Guanglei Zhou, Jingyu Pan, Chen-Chia Chang, Yiran Chen, and Zhiyao Xie*
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023. (Acceptance rate=23%) pdf code

• ICCAD’23 MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang*, and Zhiyao Xie*
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023. (Acceptance rate=23%) pdf code

• DAC’23 PertNAS: Architectural Perturbations for Memory-Efficient Neural Architecture Search
  Afzal Ahmad, Zhiyao Xie, and Wei Zhang
  ACM/IEEE Design Automation Conference (DAC), 2023. (Acceptance rate=23%) pdf code

• DAC’23 PROPHET: Predictive On-Chip Power Meter for Hardware DNN Accelerator
  Jian Peng, Tingyuan Liang, Zhiyao Xie, and Wei Zhang
  ACM/IEEE Design Automation Conference (DAC), 2023. (Acceptance rate=23%) pdf

• ISPD’23 Efficient Runtime Power Modeling with On-Chip Power Meters (Invited)
  Zhiyao Xie*
  International Symposium on Physical Design (ISPD), 2023. ACM pdf

• ISQED’23 Security and Reliability Challenges in Machine Learning for EDA: Latest Advances (Invited)
  Zhiyao Xie*, Tao Zhang, and Yifeng Peng
  International Symposium on Quality Electronic Design (ISQED), 2023. IEEE pdf

• FPGA’23 FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs
  Linfeng Du, Tingyuan Liang, Sharad Sinha, Zhiyao Xie, and Wei Zhang
  ACM International Symposium on Field-Programmable Gate Arrays (FPGA), 2023. (Acceptance rate=28%) ACM pdf code

• ASPDAC’23 Rethink before Releasing your Model: ML Model Extraction Attack in EDA
  Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Jiang Hu, and Yiran Chen
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2023. (Acceptance rate=31%) ACM pdf
  Best Paper Award (2 awardees out of 328 submissions) record

• ASPDAC’23 Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction
  Chen-Chia Chang, Jingyu Pan, Zhiyao Xie, Yaguang Li, Yishuang Lin, Jiang Hu, and Yiran Chen
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2023. (Acceptance rate=31%) ACM pdf
  Best Paper Nomination (11 nominees out of 328 submissions) record

In 2022:

• TCAD’22 Pre-Placement Net Length and Timing Estimation by Customized Graph Neural Network
  Zhiyao Xie*, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Chen-Chia Chang, Jingyu Pan, and Yiran Chen
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022. IEEE pdf

• ICCAD’22 DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters
  Zhiyao Xie, Shiyu Li, Mingyuan Ma, Chen-Chia Chang, Jingyu Pan, Yiran Chen, and Jiang Hu
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2022. (Acceptance rate=22.5%) ACM pdf code

• ICCAD’22 Robustify ML-based Lithography Hotspot Detectors
  Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Jiang Hu, and Yiran Chen
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2022. (Acceptance rate=22.5%) ACM pdf

• DAC’22 Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Data
  Jingyu Pan, Chen-Chia Chang, Zhiyao Xie, Ang Li, Minxue Tang, Tunhou Zhang, Jiang Hu, and Yiran Chen
  ACM/IEEE Design Automation Conference (DAC), 2022. (Acceptance rate=23%) ACM pdf

Before joining HKUST in 2022 summer:

• MICRO’21 APOLLO: An Automated Power Modeling Framework for Runtime Power Introspection in High-Volume Commercial Microprocessors
  Zhiyao Xie, Xiaoqing Xu, Matt Walker, Joshua Knebel, Kumaraguru Palaniswamy, Nicolas Hebert, Jiang Hu, Huanrui Yang, Yiran Chen, and Shidhartha Das
  IEEE/ACM International Symposium on Microarchitecture (MICRO), 2021. (Acceptance rate=22%) ACM pdf
  Best Paper Award (1 awardee out of 430 submissions) record

• ICCAD’21 Automatic Routability Predictor Development Using Neural Architecture Search
  Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, and Yiran Chen
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2021. (Acceptance rate=23.5%) ACM pdf

• ASPDAC’21 Net$^2$: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation
  Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Yixiao Duan, and Yiran Chen
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2021. (Acceptance rate=34%) IEEE pdf

• ICCAD’20 Fast IR Drop Estimation with Machine Learning (Invited)
  Zhiyao Xie, Hai Li, Xiaoqing Xu, Jiang Hu, and Yiran Chen
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2020. (Acceptance rate=27%) IEEE pdf

• ICCAD’20 Routing-Free Crosstalk Prediction
  Rongjian Liang, Zhiyao Xie, Jinwook Jung, Vishnavi Chauha, Yiran Chen, Jiang Hu, Hua Xiang, and Gi-Joon Nam
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2020. (Acceptance rate=27%) IEEE pdf

• ASPDAC’20 FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning
  Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, and Erick Carvajal Barboza
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2020. (Acceptance rate=31%) IEEE pdf

• ASPDAC’20 PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network
  Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, and Yiran Chen
  Asia and South Pacific Design Automation Conference (ASP-DAC), 2020. (Acceptance rate=31%) IEEE pdf

• DATE’19 Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model
  Yu-Hung Huang, Zhiyao Xie, Guan-Qi Fang, Tao-Chun Yu, Haoxing Ren, Shao-Yun Fang, Yiran Chen, and Jiang Hu
  Design, Automation and Test in Europe Conference (DATE), 2019. (Acceptance rate=24%) IEEE pdf

• ICCAD’18 RouteNet: Routability Prediction for Mixed-Size Designs Using Convolutional Neural Network
  Zhiyao Xie, Yu-Hung Huang, Guan-Qi Fang, Haoxing Ren, Shao-Yun Fang, Yiran Chen, and Jiang Hu
  IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2018. (Acceptance rate=24.5%) IEEE pdf

Book Chapter

• Book Chapter’23 Chapter 2: Deep Learning for Routability Prediction
  Zhiyao Xie, Jingyu Pan, Chen-Chia Chang, Rongjian Liang, Erick Carvajal Barboza, and Yiran Chen
  In Book: Machine Learning Applications in Electronic Design Automation, 2023. Springer pdf

• Book Chapter’23 Chapter 3: Net-Based Machine Learning-Aided Approaches for Timing and Crosstalk Estimation
  Rongjian Liang, Zhiyao Xie, Erick Carvajal Barboza, and Jiang Hu
  In Book: Machine Learning Applications in Electronic Design Automation, 2023. Springer pdf

Ph.D. Dissertation

• Dissertation’22 Intelligent Circuit Design and Implementation with Machine Learning
  Zhiyao Xie
  PhD Dissertation of Duke University, 2022. Proquest pdf
  ACM Outstanding Dissertation Award in EDA (1 awardee worldwide per year) record
  EDAA Outstanding Dissertation Award (4 awardees worldwide per year) record

Patent

• Patent Method and Apparatus for On-chip Power Metering Using Automated Selection of Signal Power Proxies
  Xiaoqing Xu, Zhiyao Xie, and Shidhartha Das
  US Patent US11726116B2, granted in 2023 Patent

• Patent IR Drop Prediction with Maximum Convolutional Neural Network
  Zhiyao Xie, Haoxing Ren, Brucek Khailany, and Sheng Ye
  US Patent US11645533B2, granted in 2023 Patent

• Patent Method and Apparatus for Power Measurement in Electronic Circuit Design and Analysis
  Xiaoqing Xu, Zhiyao Xie, Shidhartha Das, Matthew James Walker, Kumara Guru Palaniswamy, and Matthew Paul Elwood
  US Patent US11959950B2, granted in 2024 Patent

Media Coverage

• “Three Professors Awarded HK$12.6 Million in RGC’s Collaborative Research Fund 2024/25”
  HKUST SENG Recognition, 2025. News pdf png
• “SRC Computer Aided Test and Design Researchers Receive Big Awards,”
  SRC CONNECTIONS Newsletter September, 2023. News png
• “Prof. XIE Zhiyao Won Two Outstanding PhD Dissertation Awards in Electronic Design Automation,”
  ACCESS Feature News, 2023. News pdf jpg jpg
• “Prof. XIE Zhiyao Won Two Outstanding PhD Dissertation Awards in Electronic Design Automation,”
  HKUST News, 2023. News pdf jpg jpg
• “AI Models Microprocessor Performance in Real-Time,”
  Duke University News, 2021. News pdf
• “Apollo: Made to measure,”
  Arm Research Articles. News pdf
• “Fast, Accurate, and Low-cost: An Automated Power Analysis Framework (Chinese),”
  AI Tech Review / AI 科技评论, 2021. News pdf
• “A New Power Modeling Method APOLLO (Chinese),”
  AI Era / 新智元, 2021. News pdf
• “CPU Power Introspection at Lower Cost (Chinese),”
  Synced / 机器之心, 2021. News pdf
• “APOLLO: A Fast IC Measurement Solution (Chinese),”
  China Science Daily / 中国科学报, 2021. News pdf

Blog Article

• Zhiyao Xie, “Will AI change EDA? (Chinese),”
  StarryHeavensAbove, 2022. News pdf
• Zhiyao Xie, “Review of Top EDA Conference: DAC’21 (Chinese),”
  AI Tech Review / AI 科技评论, 2021. News pdf